Principal electronics engineer — concept to silicon, schematic to signoff.

Silicon to systems. Schematic to signoff. ISO 26262 to RISC-V.

Worked at or with: Apple, IBM, Sequent, Silicon Graphics, Tektronix, Xerox, Biamp, Apcon, Vay

What I do

• Functional Safety & FMEDA (ISO 26262) — ASIL-A through ASIL-D safety case work, gap analysis, diagnostic coverage modeling.
• RISC-V / SoC Architecture — custom-core definition, pipeline trade-offs, cache and memory hierarchy, ISA extensions, design reviews.
• Verification & Emulation — SystemVerilog/UVM, Synopsys VCS · Verdi · ZeBu · HAPS, Cadence Xcelium, JasperGold, TLA+.
• Board-Level Analog/Digital & PCB — schematic, LTspice, Altium / OrCAD / Allegro layout, signal & power integrity. PCB fabrication resource available.
• Technical Due Diligence — independent assessment of silicon, hardware, and RTL assets for VCs, acquirers, and boards.

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Engagements by negotiation — scope, rate, and terms tailored to your project.